K
K
8
8
N
N
H
H
A
A
G
G
r
r
a
a
n
n
d
d
31
Note:
Because the overclock, overvoltage, and hardware monitor features
are controlled by several separate chipset, [WarpSpeeder™] divide
these features to separate panels. If one chipset is not on board, the
correlative button in Main panel will be disabled, but will not interfere
other panels’ functions. This property can make [WarpSpeeder™] utility
more robust.
9/06, 2004
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